Jose Alejandro Galaviz-Aguilar received the M.Sc. (2013) and Ph.D. (2017) degrees in Digital Systems from the Instituto Politecnico Nacional (IPN-CITEDI) in Tijuana, Mexico. From 2014 to 2016, he was a Visiting Scholar at the RF Nonlinear Research Laboratory, Department of Electrical and Computer Engineering, The Ohio State University, Columbus, OH, USA.
From October 2024 to December 2025, he was an RF R&D Engineer at Telecom Paris (France) within the Docte6G national project in collaboration with NXP Semiconductors, developing next-generation digital predistortion techniques for millimeter-wave 6G systems. Previously, he held a postdoctoral research position at Tecnologico de Monterrey (2020–2026), where he led projects on reconfigurable intelligent surfaces, FPGA-based LDPC encoder/decoders, and 5G massive MIMO spectral optimization.
He is an IEEE Senior Member and a member of the Mexican National Researchers System (SNII) Level I. His research spans RF power amplifier linearization, digital predistortion, NARMA behavioral modeling, FPGA-based DSP implementation, and machine learning techniques for nonlinear RF systems.
Signal processing, PA modeling, DPD algorithms
VHDL, Verilog, SystemVerilog, UVM
NVNA, spectrum analyzers, automated testbeds
Quartus, Xilinx ISE, Keysight ADS, Modelsim
DPD linearization, NARMA, spline modeling
HDL code generation, fixed-point design, hardware verification
15+ journal/conference papers, IEEE reviewer